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Intel reveals new multicore architecture

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With energy efficiency as the standard, Intel Corp. has announced a new multicore architecture that aims to address consumers' increasing need for better price and higher performance per watt for notebooks, desktops, and servers.

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The Intel Core Micro-architecture is built from the power-saving design of Intel's Pentium M processor for laptops. Thomas Kilroy, vice president and general manager for Intel's digital enterprise group, said this new architecture has addressed the classic tradeoff between energy efficiency and performance with their next-generation processors.

"You don't have to compromise high performance for range and economy. People will see systems that can be faster, smaller, and quieter with longer battery life and lower electric bills. We found a way to do that with Merom for mobile, Woodcrest for servers, and Conroe for desktops," Kilroy said during Intel's recent Developer Forum held here.

Kilroy said that Merom could give a performance boost of up to 20 percent with no increase in power consumption. Woodcrest, meanwhile, could give a performance boost of up to 80 percent with a 35 percent decrease in power.

Conroe, Intel's new dual-core chip for desktop scheduled for release later this year, will provide up to 40 percent increase in performance and 40 percent decrease in power consumption.

Intel's Core Micro-architecture features the following key innovations:

Intel Wide Dynamic Execution -- This delivers more instructions per clock cycle, improving execution and energy efficiency. "Every execution core is wider, allowing each core to complete up to four full instructions simultaneously using an efficient 14-stage pipeline," said Kilroy.

Intel Advanced Digital Media Boost -- This executes 128-bit SSE, SSE2, and SSE3 instructions within only one cycle. Kilroy said that this doubles the execution speed for these instructions, which are used widely in multimedia and graphics applications.

Intel Intelligent Power Capability -- This includes features that further reduce power consumption by powering on individual logic subsystems only when required.

Intel Smart Memory Access -- By hiding memory latency and optimizing the use of data bandwidth out to the memory subsystem, the smart memory access improves system performance.

Intel Advanced Smart Cache -- This includes a shared L2 cache to reduce power by minimizing memory traffic and increase performance by allowing one core to utilize the entire cache when the other core is idle.

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